Reclocking data on SSD hardDrive

I created a video how asynchronous USB DAC communicate with PC, especially how FIFO decouples DAC clock to USB clock. See DAC clock and USB microframe timings are not synchronized at all, and DAC chip sorely driven by DAC clock timings. Ethernet DAC is much more complicated but basic idea is the same.

Honestly ,as much as I appreciate the time you're taking to explain I'd rather see someone trying to explain why it DOES work, I mean the audible difference between a regular SSD and the femto SSD , and powering it from the ATX supply or a linear PSU is very real...

4 hours ago, MarcelNL said:

Honestly ,as much as I appreciate the time you're taking to explain I'd rather see someone trying to explain why it DOES work, I mean the audible difference between a regular SSD and the femto SSD , and powering it from the ATX supply or a linear PSU is very real...

One possible explanation is, somehow regulated power voltage to DAC chip is fluctuated, DAC clock low-to-hi transition timings are slightly move forward/back in temporal axis, and effectively clock jitter for converting D to A is increased. When it happens, output analog signal will be distorted slightly and it is measured as unwanted peaks of sidelobe on a spectrum analyzer.

On a CD player era, local audio magazine explained something like this: when C1 or C2 event occurs on reading the surface pit pattern of CD, extra mechanical action of actuator servo of optical pickup may cause such reference voltage fluctuation.

On 6/17/2022 at 1:37 PM, yamamoto2002 said:

See DAC clock and USB microframe timings are not synchronized at all

 

 

 

 

 

So why are there a plethora of USB reclockers (24 MHz) in the hi-fi market?

1 hour ago, 1laraz said:

So why are there a plethora of USB reclockers (24 MHz) in the hi-fi market?

Because neurotic audiophiles will buy them.

7 hours ago, 1laraz said:

So why are there a plethora of USB reclockers (24 MHz) in the hi-fi market?

Original usage of repeater is to extend the cable length beyond the limit of passive highspeed USB cable (5m). With two 5m USB cables and a repeater, it is possible to send USB signal to the USBDAC 10m apart. In addition to it, products marketed for audio is expected to eliminate the noise of Vcc 5V power delivery to some extent. It depends on USBDAC design whether cleaner Vcc results cleaner analog output signal or not.

On 6/17/2022 at 2:28 PM, yamamoto2002 said:

 

One possible explanation is, somehow regulated power voltage to DAC chip is fluctuated, DAC clock low-to-hi transition timings are slightly move forward/back in temporal axis, and effectively clock jitter for converting D to A is increased. When it happens, output analog signal will be distorted slightly and it is measured as unwanted peaks of sidelobe on a spectrum analyzer.

 

On a CD player era, local audio magazine explained something like this: when C1 or C2 event occurs on reading the surface pit pattern of CD, extra mechanical action of actuator servo of optical pickup may cause such reference voltage fluctuation.

Right and any such voltage fluctuations are isolated across a network. For example the HQPlayer/NAA model puts the drive very far away electrically from the DAC

The following video briefly explains USB audio FIFO and flow control. He explains about adaptive isochronous transfer mode that had been used in very old USB audio devices, then asynchronous isochronous transfer mode that modern USB audio devices use. USB specification document is ambiguous but "It slows or speeds up (to target sample rate) means:

• USB clock is constant frequency oscillator and it cannot change oscillation frequency. USB microframe timing is also constant.
• Flow control feedback data from DAC contains the desirable signal data rate. For example of 44100Hz playback, FIFO buffer is near full and DAC want for USB host to slow down by 20%, feedback data contains "please send PCM data with 36750Hz speed"
• USB host receives the feedback and reduces PCM sample count by 20% from the next USB frame that contains PCM samples in the payload. IMO it is important to understand USB clock nor USB microframe timing do not slow down for flow control.